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Oracle® Server X6-2L Service Manual

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Updated: January 2018
 
 

DIMM and Processor Physical Layout

The physical layout of the DIMMs and processor(s) is shown in the following figure. When viewing the server from the front, processor 0 (P0) is on the left. Notice that each processor, P0 and P1, have four memory channels that are labeled, from left to right, Ch C, Ch D, Ch B, and Ch A.

Figure 3  DIMM and Processor Physical Layout

image:Figure showing the DIMM and processor layout.


Note -  In single-processor systems, the DIMM sockets associated with processor 1 (P1) are nonfunctional and should not be populated with DIMMs.

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