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SPARC T5-2 Server Service Manual

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Updated: February 2019
 
 

I/O Root Complex Connections

On the 2-processor server, each CPU connects to four of the PCIe slots. Each PCIe slot also uses a specific I/O subsystem (IOS0 or IOS1) and PCIe Switch (0 or 1)

  • CPU0, IOS1, and PCIe Switch 0 connect to slot 1.

  • CPU0, IOS0, and PCIe Switch 1 connect to slots 5, 6, and 7.

  • CPU1, IOS1, and PCIe Switch 0 connect to slots 2, 3, and 4.

  • CPU1, IOS0, and PCIe Switch 1 connect to slot 8.

On the 1-processor server, the single CPU connects to all eight of the PCIe slots. Each PCIe slot uses a specific I/O subsystem (IOS0 or IOS1) and PCIe Switch (0 or 1)

  • CPU0, IOS1, and PCIe Switch 0 connect to slot 1, 2, 3, and 4.

  • CPU0, IOS0, and PCIe Switch 1 connect to slots 5, 6, 7, and 8.


Note - For diagrams showing connections between PCIe slots and root complexes for the 2-processor and 1-processor servers, see System Schematic.

The pci@ values reported in the OpenBoot show-devs command output are paths in the I/O root complex topology. The values are different for the 2-processor and 1-processor servers.

2-processor server root complex paths:

PCIe Slot
CPU
IOS
PCIe Switch
Root Complex Path
Oracle ILOM Target
1
0
1
0
/pci@300/pci@1/pci@0/pci@4
/SYS/MB/PCIE1
2
1
1
0
/pci@380/pci@1/pci@0/pci@5
/SYS/MB/PCIE2
3
1
1
0
/pci@380/pci@1/pci@0/pci@6
/SYS/MB/PCIE3
4
1
1
0
/pci@380/pci@1/pci@0/pci@7
/SYS/MB/PCIE4
5
0
0
1
/pci@340/pci@1/pci@0/pci@4
/SYS/MB/PCIE5
6
0
0
1
/pci@340/pci@1/pci@0/pci@5
/SYS/MB/PCIE6
7
0
0
1
/pci@340/pci@1/pci@0/pci@6
/SYS/MB/PCIE7
8
1
0
1
/pci@3c0/pci@1/pci@0/pci@7
/SYS/MB/PCIE8

1-processor server root complex paths:

PCIe Slot
CPU
IOS
PCIe Switch
Root Complex Path
Oracle ILOM Target
1
0
1
0
/pci@300/pci@1/pci@0/pci@4
/SYS/MB/PCIE1
2
0
1
0
/pci@300/pci@1/pci@0/pci@5
/SYS/MB/PCIE2
3
0
1
0
/pci@300/pci@1/pci@0/pci@6
/SYS/MB/PCIE3
4
0
1
0
/pci@300/pci@1/pci@0/pci@7
/SYS/MB/PCIE4
5
0
0
1
/pci@340/pci@1/pci@0/pci@4
/SYS/MB/PCIE5
6
0
0
1
/pci@340/pci@1/pci@0/pci@5
/SYS/MB/PCIE6
7
0
0
1
/pci@340/pci@1/pci@0/pci@6
/SYS/MB/PCIE7
8
0
0
1
/pci@340/pci@1/pci@0/pci@7
/SYS/MB/PCIE8

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