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/SYS/SPx/BAT
/SYS/SPPx/BAT
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/SYS/CMIOUx/CM
/SYS/CMIOUx
/SYS/CMIOUx/CM/CMP
SPARC M8-8: x is 0–7
SPARC M7-8: x is 0–7
SPARC M7-16: x is 0–15
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/SYS/CMIOUx/CM/CMP/BOByw/CHz/DIMM
SPARC M8-8: x is 0–7,
y is 0–3, w is 0 or
1, z is 0 or 1
SPARC M7-8: x is 0–7,
y is 0–3, w is 0 or
1, z is 0 or 1
SPARC M7-16: x is 0–15,
y is 0–3, w is 0 or
1, z is 0 or 1
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Fan modules (CMIOU chassis)
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/SYS/FMx
Bottom CMIOU chassis: x is 0–7
Top CMIOU chassis: x is 8–15
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Fan modules (switch chassis)
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/SYS/SWUx/FMy
x is 0–5, y is
0–5
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/SYS/CMIOUx/FPGA
SPARC M8-8: x is 0–7
SPARC M7-8: x is 0–7
SPARC M7-16: x is 0–15
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FPGA (SP)
FPGA (SP) SSI links (SPARC M8-8 and SPARC M7-8)
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/SYS/SPx/FPGA
/SYS/SPx/FPGA/SSI_LINKy
x is 0 or 1, y is
0–7
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FPGA (SPP)
FPGA (SPP) SSI links (SPARC M7-16)
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/SYS/SPPx/FPGA
/SYS/SPPx/FPGA/SSI_LINKy
x is 0–3, y is
0–7
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FPGA (switch unit)
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/SYS/SWUx/FPGA
x is 0–5
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Front indicator panel (SPARC M8-8 and SPARC M7-8)
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/SYS/FOPNL
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Front indicator panel (SPARC M7-16)
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/SYS/FOPNLx
x is 0–2
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ICID (SPARC M8-8 and SPARC M7-8)
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/SYS/ICID
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ICID (SPARC M7-16)
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/SYS/ICIDx
x is 0–2
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/SYS/ITx/interconnect-name
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PCIe cards
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/SYS/CMIOUx/PCIEy
/SYS/CMIOUx/PCIEy/CAR
SPARC M8-8: x is 0–7,
y is 1–3
SPARC M7-8: x is 0–7,
y is 1–3
SPARC M7-16: x is 0–15,
y is 1–3
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/SYS/PDECBx
SPARC M8-8: x is 0–7
SPARC M7-8: x is 0–7
SPARC M7-16: x is 0–21
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/SYS/PSx
SPARC M8-8: x is 0–5
SPARC M7-8: x is 0–5
SPARC M7-16: x is 0–15
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Rear indicator panel (SPARC M8-8 and SPARC M7-8)
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/SYS/ROPNL
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Rear indicator panel (SPARC M7-16)
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/SYS/ROPNLx
x is 0-2
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/SYS/SPx
x is 0 or 1
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SPDB (SPARC M8-8 and SPARC M7-8)
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/SYS/SPDB
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SPDB (SPARC M7-16)
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/SYS/SPDBx
x is 0–2
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/SYS/SPx/SPMy
SPARC M8-8 and SPARC M7-8 (two PDomains): x is 0, 1
and y is 0, 1
SPARC M8-8 and SPARC M7-8 (one PDomain): x is 0, 1
and y is 0
/SYS/SPPx/SPMy
SPARC M7-16: x is 0–3,
y is 0–1
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SPMs (switch chassis, SPARC M7-16)
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/SYS/SPx/SPMy
x is 0–1, y is
0
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/SYS/SPPx
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/SYS/SWUx
x is 0–5
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