BIOS POST Memory Testing Process

The BIOS POST memory testing is performed as follows:

1. The first megabyte of DRAM is tested by the BIOS before the BIOS code is copied from ROM to DRAM.

2. After exiting out of DRAM, the BIOS performs a simple memory test (where a write/read of every location with the pattern 55aa55aa is performed).

   ---

   Note - The simple memory test is performed only if Quick Boot is not enabled from the Boot Settings Configuration screen. Enabling Quick Boot causes the BIOS to skip the memory test.

   ---

3. The BIOS polls the memory controllers for both correctable and non-correctable memory errors and logs those errors into the SP.

4. The message, BMC Responding, displays at the end of POST.

Related Information

• Default BIOS POST Events

• BIOS POST F1 and F2 Errors